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1997 Course Computer Architecture

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Total No. of Questions : 10] P1108 [Total No. of Pages : 3 [3664]-25 B.E. (E & TC) COMPUTER ARCHITECTURE (1997 Course) (404181) Time : 3 Hours] [Max. Marks : 100 Instructions to the candidates: 1) Answer any 3 questions from each section. 2) Answer three questions from Section - I and three questions from Section - II. 3) Attempt not more than six questions of which at least three questions must be from each section. 4) Answers to the two sections should be written in separate books. 5) Neat diagrams must be drawn wherever necessary. 6) Figures to the right indicate full marks. 7) You are advised to attempt not more than six questions. 8) Your answers will be valued as a whole. 9) Assume suitable data, if necessary. SECTION - I Q1) Answer the following questions in brief (any six) : [18] a) What is parallel processing ? How it is related to distributed processing? b) List only the Flynn s machine organizations. c) State only the major steps of executing an instruction in a digital computer. d) Explain the basic use of vectorizing compiler. e) What is the use of functional pipeline structure in the second-generation vector processors? f) State how memory can be classified according the accessing method. g) Define through put related to linear pipeline. Q2) a) b) Distinguish among computer terminologies in each of the following groups : [8] i) Uniprocessor and Multiprocessor systems. ii) Control flow and data flow computers. With the help of block schematic explain the basic principle of MISD computer. [8] P.T.O. Q3) a) b) Explain in brief the operation of cache memory. [8] What are the placement policies of cache memory? Explain one policy in brief. [8] Q4) a) With the help of block schematic explain the pipelined structure of a typical CPU. [8] Compare the following pipeline structures : [8] i) Static Pipelines and Dynamic Pipelines. ii) Scalar Pipelines and Vector Pipelines. b) Q5) a) b) State vector processing significance; hence explain the characteristics of vector processing. [8] State and explain the requirements of scalar and super scalar processor. [8] SECTION - II Q6) a) b) Explain with proper example the concept of virtual memory. Explain how virtual to real page address translation takes place. Q7) a) Explain the following related to segment memory system : [8] i) Segment table (ST). ii) STBR. iii) STE. iv) AST. Distinguish parallel processing at job level, task level, the instruction level and the intrainstruction level. [8] b) [8] [8] Q8) a) b) Describe at least four characteristics of MIMD multiprocessors. [8] Prove that a K-stage linear pipeline can be at most K times faster than that of non pipelined serial processor. [8] Q9) a) Explain the following related to Memory with page segments : i) Linear segmentation. ii) Segmented name space. iii) Page-fault. iv) Page size. [3664]-25 2 [8] b) State different Hazard detection methods in pipeline process and explain one method in brief. [8] Q10)Write short notes on (any three) : a) CISC processor. b) RISC processor. c) TLB. d) Multithread. [18] vvvv [3664]-25 3

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