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2003 Course VLSI Design (Elective II)

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Total No. of Questions :12] P1343 [Total No. of Pages : 3 [3764]-213 B.E. (Electrical) VLSI DESIGN (Elective - II) (2003 Course) Time :3 Hours] [Max. Marks : 100 Instructions to candidates: 1) Answer any three questions from each section. 2) Answer three questions from Section I and three questions from Section II. 3) Answers to the two sections should be written in separate books. 4) Neat diagrams must be drawn wherever necessary. 5) Figures to the right indicate full marks. 6) Assume suitable data, if necessary. SECTION - I Q1) a) b) Differentiate Mealy & Moore machine modelling along with example. [6] Implement the following : i) ii) c) m ( 0, 5, 6, 7, 9, 12 ) Using 8 : 1 Mux. [3] Implement 16 : 1 Mux using only 4 : 1 Mux [3] Draw 4 bit binary UP/DOWN asynchronous MOD 16 counter along with its timing diagram. [6] OR Q2) a) What is the need of synchronous counter? Draw Mod 6 synchronous and asynchronous counter. [6] b) Draw 4 explain 4 bit PISO shift register. [6] c) Draw state table state diagram and Implement 101 detector. [6] Define and explain in brief : [8] i) Entity. ii) Architecture. iii) Component. iv) Configuration. Draw ckt. of 2 4 decoder and write its VHDL code. [8] Q3) a) b) OR P.T.O. Q4) a) Write VHDL code for MOD 100 counter and draw flowchart for it. [8] b) What is an architecture? What are its types? Explain any one of it with example. [8] Q5) a) b) Explain various data types and data objects of VHDL. [8] What do you mean by configuration? How it can be use in practical application. Explain with VHDL code. [8] OR Q6) a) b) What do you mean by sub-program. Explain with VHDL code. [8] What do you understand by package? Explain it with practical electrical application. [8] SECTION - II Q7) a) Differentiate CMOS and NMOS. [4] b) Explain the construction of MOSFET. [4] c) Explain w.r.t. CMOS and give std. value. i) Fan in. ii) Fan out. iii) Power dissipation. iv) Figure of merit. v) [10] Noise margin. OR Q8) a) Implement following gates using CMOS : i) NOT. ii) AND. iii) OR. iv) EX OR. [8] b) Explain the voltage transfer characteristics of CMOS inverter. [5] c) Explain Depletion type MOSFET. [5] [3764]-213 2 Q9) a) Explain the Architecture of FPGA with the help of Xilinx 4000 family. [8] b) Explain the complete process of simulation and synthesis in detail. [8] OR Q10)a) b) Q11) a) b) Explain the Architecture of CPLD along with its detailed diagram. [8] Explain the process of place and route and simulation with its types. [8] Write VHDL code for 8 8 RAM. [8] Draw block diagram and write VHDL code for 4 bit ALU. [8] OR Q12)a) b) Write VHDL code for Barrel shifter. [8] Write VHDL code and explain 64 bit comparator. [8] #### [3764]-213 3

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