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2003 Course VLSI Design

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Total No. of Questions : 12] P1517 [Total No. of Pages : 3 [3764]-224 B.E. (E & TC) VLSI DESIGN (404217) Time : 3 Hours] [Max. Marks : 100 Instructions to candidates : 1) Answer 3 questions from Section I and 3 questions from Section II. 2) Answers to the two sections should be written in separate books. 3) Neat diagrams must be drawn wherever necessary. 4) Figures to the right indicate full marks. 5) Assume suitable data, if necessary. SECTION - I Q1) a) b) Q2) a) b) What is significance of following terms in VHDL? [8] i) Library. ii) Use. Write VHDL code & test bench for 2-input Ex-NOR gate design with minimum number(s) of 2-input NAND gate (only) as a component using structural modelling. [10] OR Explain two main processes by writing VHDL code(s) for D-Flip-Flop. What happens if VHDL designer do not assigns an output signal a value in a clocked process? [10] Write the following things in tabulated form i) Synthesiable & Non-synthesiable VHDL statements. ii) Concurrent, sequential and both concurrent plus sequential VHDL statements. [8] Q3) a) Draw FSM for (i) D-Flip Flop (ii) J-K Flip Flop and write VHDL code and test bench which will cover all state table conditions. [12] b) Explain the term Metastability with example. [4] OR Q4) Draw FSM and write VHDL code for a system which has a single bit input X and two single bit outputs Y and Z . The output of system is asserted logic 1 to Y and Z when system detects in input stream of serial bits ...... 1001.... or .... 1010 ... respectively. Comment on the hardware infered due to Gray state encoding instead of Binary state encoding in above system design. [16] P.T.O.

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