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Pune University - Sem - II : Design & Implementation of, April 2010 (Old Course)

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Total No. of Questions : 5] [Total No. of Pages : 2 P1163 [3729]- 22 M.Sc. - I ELECTRONIC SCIENCE EL2 UT 04 : Design and Implementation of Digital Circuits (Old) (Sem. - II) Time : 3 Hours] Instructions to the candidates: 1) All questions are compulsory. 2) Figures to the right indicate full marks. 3) Neat diagrams must be drawn wherever necessary. [Max. Marks : 80 Q1) Attempt any two : [16] a) Design a system accept 2 digit number from two different sources and display two digit number on common display. b) Define Bus. Explain the busing structure of microprocessor. What is floating bus? What is bus contension and how it is avoided. c) Design a BCD to Gray code converter using decoder and logic gates. Q2) Attempt any two : a) [16] Design the sequential circuit with JK filp flop to satisfy the following equations. A (t + 1) = A B CD + A B C + ACD + AC D B (t + 1) = A C + CD + A BC C (t + 1) = B D (t + 1) = D b) Draw logic diagram of ALU, explain the function table for 2 bit data. c) Design synchronous counter to produce 0,2,4,3,6,7 and repeat. Q3) Attempt any two : [16] a) What is OLMC in GAL 16V 8? List different parts and different modes with dedicated input pins in GAL 16V 8. b) Draw the block diagram of bit organized processor. Discuss its merits and demerits. c) What is PLA? Draw diagram showing PLA structure. Implement any example of combination circuit using PLA. P.T.O.

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Additional Info : M.Sc. - I Electronic Science, EL1 UT 04 : Design & Implementation of Digital Circuits (Old Course) (Semister - II), Pune University
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